Journal of Electronic Materials (v.41, #9)

A new technique for measuring thermal conductivity with significantly improved accuracy is presented. By using the Peltier effect to counterbalance an imposed temperature difference, a completely isothermal, steady-state condition can be obtained across a sample. In this condition, extraneous parasitic heat flows that would otherwise cause error can be eliminated entirely. The technique is used to determine the thermal conductivity of p-type and n-type samples of (Bi,Sb)2(Te,Se)3 materials, and thermal conductivity values of 1.47 W/m K and 1.48 W/m K are obtained respectively. To validate this technique, those samples were assembled into a Peltier cooling device. The agreement between the Seebeck coefficient measured individually and from the assembled device were within 0.5%, and the corresponding thermal conductivity was consistent with the individual measurements with less than 2% error.
Keywords: Thermoelectric power generation; thermal conductivity; Seebeck coefficient

Size-Quantization Semimetal–Semiconductor Transition in Bi0.98Sb0.02 Nanowires: Thermoelectric Properties by A.A. Nikolaeva; L.A. Konopko; T.E. Huber; P.P. Bodiul; I.A. Popov; E.F. Moloshnik (2313-2316).
We fabricated Bi0.98Sb0.02 wires with diameters in the range between 200 nm and 2 μm and studied their electronic transport and thermoelectric properties. Rotational diagrams and strong Shubnikov–de Haas oscillations show that the wires have a high degree of crystallinity. The temperature dependence of the resistance evidences a semimetal–semiconductor transition at a critical diameter of roughly 300 nm. Our BiSb nanowire samples feature both electrons and holes that contribute to negative and positive thermopower, respectively; we find evidence of the interplay between the two types of carriers according to wire diameter and temperature. An evaluation of the power factor, and of its dependence on wire diameter, temperature, and the magnitude and direction of the magnetic field, is presented.
Keywords: Semimetal–semiconductor transition; nanowires; power factor

Preparation and Transport Properties of Bi2O2Se Single Crystals by C. Drasar; P. Ruleova; L. Benes; P. Lostak (2317-2321).
Bi2O2Se single crystals were grown by a gas-phase transport reaction with a temperature gradient. X-ray diffraction revealed that the products crystallized in a tetragonal-type lattice with lattice parameters a = 0.38866 nm and c = 1.22001 nm. The samples were characterized by measuring the electrical conductivity, Hall coefficient, and Seebeck coefficient as functions of temperature between 80 K and 470 K. The obtained experimental data allowed us to calculate the reduced Fermi level, provided that the single-valley parabolic model applied. The corresponding value of the electron effective mass proved to be m ef ≈ 0.29. Free electron mobility is governed by the scattering of carriers by acoustic phonons.
Keywords: Semiconductors; crystal growth; electrical transport

Thermal Conductivity of InAs/GaSb Type II Superlattice by Chuanle Zhou; B. -M. Nguyen; M. Razeghi; M. Grayson (2322-2325).
The cross-plane thermal conductivity of a type II InAs/GaSb superlattice (T2SL) is measured from 13 K to 300 K using the 3ω method. Thermal conductivity is reduced by up to two orders of magnitude relative to the GaSb bulk substrate. The low thermal conductivity of around 1 W/m K to 8 W/m K may serve as an advantage for thermoelectric applications at low temperatures, while presenting a challenge for T2SL interband cascade lasers and high-power photodiodes. We describe a power-law approximation to model nonlinearities in the thermal conductivity, resulting in increased or decreased peak temperature for negative or positive exponents, respectively.
Keywords: Thermal conductivity; type II superlattice; interband cascade lasers; photodiode; thermoelectric

Thermoelectric Figure of Merit Enhancement in Bi2Te3-Coated Bi Composites by T. W. Lan; Y. C. Chen; J. C. Ho; S. G. Shyu; Y. Y. Chen (2326-2330).
This study examines the thermoelectric behavior of composites containing hydrothermally processed tellurium-coated bismuth particles of various sizes. Since only a very thin layer of Bi2Te3 forms on the particle surface, the high-pressure compacted composite is still dominated by bismuth as the main ingredient (∼96% Bi). Thermoelectric figure of merit ZT values are derived from measurements of thermal conductivity, electrical resistivity, and Seebeck coefficient. As expected, a ZT value almost three times higher than that of bismuth is found. This enhancement appears to be caused mainly by lowered thermal conductivity due to the significant number of grain boundaries, short phonon mean free path in the coating layers, and lattice mismatch.
Keywords: Thermoelectric figure of merit; thermal conductivity; bismuth; hydrothermal tellurium coating

An Investigation of Electrical Contacts for Higher Manganese Silicide by Xinghua Shi; Zahra Zamanipour; Jerzy S. Krasinski; Alan Tree; Daryoosh Vashaee (2331-2337).
Five metals with large work functions including Co, Ni, Cr, Ti, and Mo and two silicides including MnSi and TiSi2 were examined to determine the best contact material for the thermoelectric material higher manganese silicide (HMS). Three-layer structures of HMS/contact/HMS were prepared in a sintering process. The contact resistance was measured versus temperature. The structures were subjected to x-ray diffraction and energy-dispersive x-ray spectroscopy examination. Thermal stability of the structures was determined by heating the samples to 700°C for different time intervals. The pure metals failed to make reliable contacts due to poor mechanical and chemical stability at high temperatures. In contrast, the metal silicides (MnSi and TiSi2) showed superior chemical and mechanical stability after the thermal stability test. The observed contact resistance of MnSi and TiSi2 was within the range of practical interest (10−5 Ω cm2 to 10−4 Ω cm2) over the entire range of investigated temperatures (20°C to 700°C). The best properties were found for the nanograined MnSi, for which the resistance of the contact was as low as 10−6 Ω cm2.
Keywords: Electrical contact; thermoelectric device; higher manganese silicide; MnSi; TiSi2 ; thermal stability

Polycrystalline samples of Ca0.98RE0.02MnO3−δ (RE = Sm, Gd, and Dy) have been prepared by conventional solid-state reactions and their properties measured at 300 K to 700 K. All samples were single phase with orthorhombic structure. The average valence and oxygen content of Ca0.98RE0.02MnO3−δ were determined by iodometric titration. Doping at the Ca site by rare-earth metals causes a strong decrease of electrical resistivity due to the creation of charge carrier content by Mn3+ in the Mn4+ matrix, as evidenced by iodometric titration results. The Seebeck coefficient of all the samples was negative, indicating that the predominant carriers are electrons over the entire temperature range. Among the doped samples, Ca0.98Dy0.02MnO3−δ had the highest dimensionless figure of merit of 0.073 at 612 K, representing an improvement of about 115% with respect to the undoped CaMnO3−δ sample at the same temperature. All the samples exhibited an antiferromagnetic transition with Néel temperature of around 120 K. Magnetization measurements indicated that Ca0.98RE0.02
Keywords: MnO3−δ samples exhibited a high-spin state of Mn3+.

Effect of the Surface Morphology of Seed and Mask Layers on InP Grown on Si by Epitaxial Lateral Overgrowth by Carl Junesand; Chen Hu; Zhechao Wang; Wondwosen Metaferia; Pritesh Dagur; Galia Pozina; Lars Hultman; Sebastian Lourdudoss (2345-2349).
Heteroepitaxy of InP on Si by epitaxial lateral overgrowth (ELOG) using a thin seed layer of InP as starting material is investigated, with special attention given to the effect of the surface morphology of the seed and the mask layers on the quality of the ELOG layers. Chemical mechanical polishing (CMP) has been used to improve the morphological and optical quality of InP grown by hydride vapor-phase epitaxy (HVPE) using ELOG. Two approaches have been investigated: polishing the InP seed layer on Si before depositing the SiO2 mask and polishing the SiO2 mask after its deposition on the unprocessed seed layer. For polishing the InP (seed)/Si, a two-step process with an aluminum oxide- and sodium hypochlorite-containing slurry as well as a slurry based on sodium hypochlorite mixed with citric acid was used. For SiO2 mask polishing, a slurry with colloidal silica as an abrasive was employed. In both cases, the SiO2 mask was patterned with double line openings and ELOG carried out in an HVPE reactor. Morphology and crystal quality of the resulting ELOG layers were studied with atomic force microscopy (AFM) and room-temperature panchromatic cathodoluminescence (PC-CL) in situ in a scanning electron microscope (SEM), respectively. The results show that, whereas both polishing approaches result in an ELOG InP layer with good morphology, its surface roughness is lower when the InP (seed)/Si is subjected to CMP prior to deposition of the SiO2 mask, than when only the SiO2 mask is polished. This approach also leads to a decrease in the number of defects generated during coalescence of the ELOG layers.
Keywords: Heteroepitaxy; InP; hydride vapor-phase epitaxy (HVPE); epitaxial lateral overgrowth (ELOG); chemical mechanical polishing (CMP); morphology; dislocations

Energy Relaxation Rates in AlInN/AlN/GaN Heterostructures by E. Tiras; S. Ardali; E. Arslan; E. Ozbay (2350-2361).
The two-dimensional (2D) electron energy relaxation in Al0.83In0.17N/AlN/GaN heterostructures has been investigated experimentally. Shubnikov–de Haas (SdH) effect measurements were employed in the investigations. The electron temperature (T e) of hot electrons was obtained from the lattice temperature (T L) and the applied electric field dependencies of the amplitude of SdH oscillations. The experimental results for the electron temperature dependence of power loss are also compared with current theoretical models for power loss in 2D semiconductors. The power loss from the electrons was found to be proportional to (T e 3  − T L 3 ) for electron temperatures in the range 1.8 K < T e < 14 K, indicating that the energy relaxation of electrons is due to acoustic phonon emission via unscreened piezoelectric interaction. The effective mass and quantum lifetime of the 2D electrons have been determined from the temperature and magnetic field dependencies of the amplitude of SdH oscillations, respectively. The values obtained for quantum lifetime suggest that remote ionized impurity scattering is the dominant scattering mechanism in Al0.83In0.17N/AlN/GaN heterostructures.
Keywords: GaN heterostructure; electron energy relaxation; power loss; phonon emission; Shubnikov–de Haas; Hall mobility

This study reports on the fabrication of thin-film transistors (TFTs) with transparent zinc oxide (ZnO) semiconductors serving as the active channel and silicon dioxide (SiO2) serving as the gate insulator. The ZnO films were deposited by radiofrequency magnetron sputtering at room temperature. Moreover, the effects of channel thickness on the structural and pulse current–voltage characteristics of ZnO TFTs using a bottom gate configuration were investigated. As the channel thickness increased, the crystalline quality and the channel conductance were enhanced. The electrical characteristics of TFTs exhibited field-effect mobilities of 8.36 cm2/Vs to 16.40 cm2/Vs and on-to-off current ratios of 108 to 107 for ZnO layer thickness of 45 nm and 70 nm, respectively. The threshold voltage was in the range of 10 V to 31 V for ZnO layer thicknesses from 35 nm to 70 nm, respectively. The low deposition and processing temperatures make these TFTs suitable for fabrication on flexible substrates.
Keywords: ZnO; TFTs; RF magnetron sputtering; field-effect mobility; on-to-off current ratio; room temperature

Anodized Macroporous Silicon Anode for Integration of Lithium-Ion Batteries on Chips by Xida Sun; Hong Huang; Kuan-Lun Chu; Yan Zhuang (2369-2375).
Macroporous silicon membranes were investigated as anodes for potential integration of lithium-ion batteries on chips. Free-standing and partially etched porous silicon membranes were fabricated from a p-type silicon wafer by using electrochemical anodization. Free-standing porous membranes were achieved with high aspect ratio of 40, average pore size of 1 μm, porosity around ~70%, and wall thickness of less than 0.1 μm. Lithium storage capacity was quantified by galvanostatic discharge/charge measurements, showing specific capacity of 1425 mAh/g with Coulombic efficiency of 81% in the first discharge/charge cycle. The discharge/charge capacity was reduced as the charge rate increased, and the capacity fading was much less pronounced at high charge rate. Morphological analyses showed an increase of surface roughness and reduction of porosity after lithiation/delithiation cycling.
Keywords: Porous silicon; lithium-ion battery; anode; microbattery

Effect of Target Density on Microstructural, Electrical, and Optical Properties of Indium Tin Oxide Thin Films by Guisheng Zhu; Li Zhi; Huijuan Yang; Huarui Xu; Aibing Yu (2376-2379).
In this paper, indium tin oxide (ITO) targets with different densities were used to deposit ITO thin films. The thin films were deposited from these targets at room temperature and annealed at 750°C. Microstructural, electrical, and optical properties of the as-prepared films were studied. It was found that the target density had no effect on the properties or deposition rate of radiofrequency (RF)-sputtered ITO thin films, different from the findings for direct current (DC)-sputtered films. Therefore, when using RF sputtering, the target does not require a high density and may be reused.
Keywords: Indium tin oxide; target density; thin film

Phosphorus Doping Effect in a Zinc Oxide Channel Layer to Improve the Performance of Oxide Thin-Film Transistors by Dong-Suk Han; Yeon-Keon Moon; Sih Lee; Kyung-Taek Kim; Dae-Yong Moon; Sang-Ho Lee; Woong-Sun Kim; Jong-Wan Park (2380-2386).
In this study, we fabricated phosphorus-doped zinc oxide-based thin-film transistors (TFTs) using direct current (DC) magnetron sputtering at a relatively low temperature of 100°C. To improve the TFT device performance, including field-effect mobility and bias stress stability, phosphorus dopants were employed to suppress the generation of intrinsic defects in the ZnO-based semiconductor. The positive and negative bias stress stabilities were dramatically improved by introducing the phosphorus dopants, which could prevent turn-on voltage (V ON) shift in the TFTs caused by charge trapping within the active channel layer. The study showed that phosphorus doping in ZnO was an effective method to control the electrical properties of the active channel layers and improve the bias stress stability of oxide-based TFTs.
Keywords: Phosphorus doping; oxide thin-film transistors; zinc oxide; oxide semiconductor; bias stress stability

AC Conductivity and Diffuse Reflectance Studies of Ag-TiO2 Nanoparticles by A.K. Abdul Gafoor; M.M. Musthafa; P.P. Pradyumnan (2387-2392).
Silver (Ag)-TiO2 nanoparticles synthesized by a low-temperature hydrothermal method in the anatase phase have been investigated by x-ray diffraction. Transmission electron microscopy has been used for morphological studies. Surface areas were studied by the Brunauer–Emmett–Teller method. Alternating-current (AC) conductivity and dielectric properties were studied for various dopant levels of 0.25 wt.%, 0.5 wt.%, and 1.0 wt.% at 300 K in the frequency range from 42 Hz to 5 MHz. AC conductivity and dielectric properties of TiO2 nanoparticles were greatly affected by loading with Ag. At high frequencies, the materials showed high AC conductivity and low dielectric constant. Diffuse reflectance studies were carried out for various dopant levels at 300 K by ultraviolet–visible (UV–Vis) spectroscopy. Considerable absorption of visible light by 0.5 wt.% and 1.0 wt.% Ag-TiO2 nanoparticles was
Keywords: observed due to the decrease of the energy band gap on Ag loading.

New single-phase A5B5O17-type compounds with the layered perovskite structure were processed in the Sr5−x La x Nb4−x Ti1+x O17 (0 ≤ x ≤ 4) composition series via a solid-state mixed-oxide route. X-ray diffraction revealed the formation of single-phase ceramics for all the compositions. Molar volume decreased while the theoretical density increased with increasing x. Optimum relative permittivity (ε r) of ~73, quality factor (Q u f 0) of ~6000 GHz, and temperature coefficient of resonant frequency (τ f ) of ~78 ppm/°C were achieved for the x = 3 (Sr2La3Ti4NbO17) composition sintered at 1500°C for 4 h.
Keywords: Dielectric properties; functional applications; sintering; electrical properties; electron microscopy

a-Ga5Ge15Te80 chalcogenide thin films have been prepared using the e-beam evaporation technique. The amorphous structure of the deposited films has been confirmed using x-ray diffraction and transmission electron microscopy techniques. The direct-current (DC) electrical conductivity and switching phenomena were studied for different Ga5Ge15Te80 film thicknesses at different temperatures. The determined activation energy ΔE σ was found to be independent of the film thickness (268 nm to 562 nm) in the measured temperature range (300 K to 380 K). IV characteristic curves of the amorphous Ga5Ge15Te80 films show a memory switching behavior. The mean value of the threshold voltage $$ ar{V}_{ m{th}} $$ increases linearly with increasing film thickness, and decreases exponentially with increasing temperature. The values of switching activation energy ε were calculated for different film thicknesses. The obtained results were explained on the basis of a thermal model for initiating the switching process, which indicates the possibility of using the composition for phase-change memory.
Keywords: Semiconductor; Ga5Ge15Te80 ; thin films; switching phenomena; thermal model; phase-change memory

Transparent conductive oxide tungsten-incorporated cadmium oxide (CdO) thin films were deposited on glass substrates by a vacuum evaporation technique. The structural, electrical, and optical properties have been investigated as functions of tungsten (W) doping content. The results show that W ions occupy structural interstitial positions in addition to accumulating on crystallite and grain boundaries. The bandgap of W-incorporated CdO films suffers narrowing that was studied within the framework of the available phenomenological models. The electrical study shows that W-incorporated CdO films are degenerate semiconductors. The lowest resistivity of 3.85 × 10−4 Ω cm was achieved, with carrier mobility of 39.2 cm2 V−1 s−1 and carrier concentration of 4.13 × 1020 cm−3, for W incorporation of 0.1%. The average transmission attained was ~80% in the near-infrared (NIR) spectral region, with the optical bandgap ranging from 1.77 eV to 2.0 eV.
Keywords: Cadmium-tungsten oxide; tungsten-doped CdO; CdO

High-quality poly(3-thiophenemalonic acid) (P3TMA), a water-soluble polythiophene derivative, was successfully electrosynthesized in boron trifluoride diethyl etherate + 50% (by volume) trifluoroacetic acid at lower potential (0.1 V versus Pt). The carboxyl groups make P3TMA highly soluble in water, facilitating its potential application as a blue-light-emitting material. P3TMA film with conductivity of 16 S cm−1 obtained from this medium showed better redox activity and thermal stability. The structure and morphology of the polymer were studied by ultraviolet–visible, Fourier-transform infrared, and nuclear magnetic resonance spectroscopy and scanning electron microscopy, respectively. To the best of our knowledge, this is the first report on electrosynthesis of P3TMA film.
Keywords: Electropolymerization; conducting polymer; poly(3-thiophenemalonic acid); fluorescence

Failure Causes of a Polymer Resettable Circuit Protection Device by Shunfeng Cheng; Kwok Tom; Michael Pecht (2419-2430).
As a circuit protection device, failure or abnormal behavior of polymer positive-temperature-coefficient resettable devices can cause damage to circuits. Identification of failure modes and determination of failure causes are necessary to improve the reliability of resettable circuit protection devices and understand their limitations. In this study, a series of experiments was conducted to identify the failure modes of polymer positive-temperature-
Keywords: coefficient resettable circuit protection devices. The causes of failures of a polymer positive-temperature-coefficient resettable circuit protection device were determined by failure analyses, including analysis of the increase in surface temperature using an infrared camera, interconnection analysis using cross-sectioning and environmental scanning electron microscopy, analysis of the microstructures of carbon-black-filled polymer composite, thermal property analysis of the polymer composite, and coefficient of thermal expansion analysis of different parts of the resettable circuit protection device.

Significant enhancement of thermoelectric (TE) performance was observed for free-standing poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:
Keywords: PSS) composite films obtained from a PEDOT:PSS aqueous solution by simultaneous addition of dimethyl sulfoxide (DMSO) and different concentrations of urea. The electrical conductivity was enhanced from 8.16 S cm−1 to over 400 S cm−1, and the maximum Seebeck coefficient reached a value of 18.81 μV K−1 at room temperature. The power factor of the PEDOT:PSS composite films reached 8.81 μW m−1 K−2. The highest thermoelectric figure of merit (ZT) in this study was 0.024 at room temperature, which is at least one order of magnitude higher than most polymers and bulk Si. These results indicate that the obtained composite films are a promising thermoelectric material for applications in thermoelectric refrigeration and thermoelectric microgeneration.

Electrical and Dielectric Properties of Exfoliated Graphite/Polyimide Composite Films with Low Percolation Threshold by Li Yu; Yi-He Zhang; Jiwu Shang; Shan-Ming Ke; Wang-shu Tong; Bo Shen; Hai-Tao Huang (2439-2446).
Exfoliated graphite/polyimide composite films were synthesized by in situ polymerization. The electrical and dielectric properties of composite films with different volume fraction of exfoliated graphite were investigated over the frequency range from 103 Hz to 3 × 106 Hz. The dielectric behavior of the composite films was investigated by percolation theory and a microcapacitor model. A low percolation threshold f c ≈ 3.1 vol.% was obtained due to the high aspect ratio of the exfoliated graphite. Both the dielectric constant and alternating-current (AC) conductivity showed an abrupt increase in the vicinity of the percolation threshold. The ultralarge enhancement of the dielectric constant near and beyond the percolation threshold was due to Maxwell–Wagner–Sillars (MWS) interfacial polarization between the exfoliated graphite and polyimide and interface polarization between the composite film and electrode.
Keywords: Dielectrics; exfoliated graphite; polyimide; thin films

Two random copolymers of phenylene vinylene and pyridinylene vinylene, ED-co-PyV-PPV and EM-co-PyV-PPV, were synthesized according to the Gilch route. The polymers possess good solubility in common solvents, and high thermal stability with 5% weight loss temperature above 378°C. The weight-average molecular weight (M w) and polydispersity index of ED-co-PyV-PPV and EM-co-PyV-PPV are 3.12 × 105 and 1.40, and 2.30 × 105 and 1.96, respectively. Single-layer polymer light-emitting diodes (PLEDs) with indium tin oxide (ITO)/poly(3,4-ethylenedioxythiophene) (PEDOT):poly(styrenesulfonate) (PSS)/polymer/Ca/Al configuration were fabricated. The turn-on voltages of the PLEDs based on ED-co-PyV-PPV and EM-co-PyV-PPV were approximately 4.0 V and 2.8 V, respectively. The ED-co-PyV-PPV PLED device exhibited the maximum luminance of ca. 4380 cd/m2 with maximum electroluminescence (EL) efficiency of 6.35 cd/A.
Keywords: Poly(p-phenylene vinylene); pyridinylene vinylene; polymer light-emitting diodes; electroluminescence

Intermetallic Compound Formation Mechanisms for Cu-Sn Solid–Liquid Interdiffusion Bonding by H. Liu; K. Wang; K.E. Aasmundtveit; N. Hoivik (2453-2462).
Cu-Sn solid–liquid interdiffusion (SLID) bonding is an evolving technique for wafer-level packaging which features robust, fine pitch and high temperature tolerance. The mechanisms of Cu-Sn SLID bonding for wafer-level bonding and three-dimensional (3-D) packaging applications have been studied by analyzing the microstructure evolution of Cu-Sn intermetallic compounds (IMCs) at elevated temperature up to 400°C. The bonding time required to achieve a single IMC phase (Cu3Sn) in the final interconnects was estimated according to the parabolic growth law with consideration of defect-induced deviation. The effect of predominantly Cu metal grain size on the Cu-Sn interdiffusion rate is discussed. The temperature versus time profile (ramp rate) is critical to control the morphology of scallops in the IMC. A low temperature ramp rate before reaching the bonding temperature is believed to be favorable in a SLID wafer-level bonding process.
Keywords: Interdiffusion; 3-D packaging; solid–liquid interdiffusion; bonding

Creep–Fatigue Crack Growth Behavior of Pb-Containing and Pb-Free Solders at Room and Elevated Temperatures by Kittichai Fakpan; Yuichi Otsuka; Yoshiharu Mutoh; Shunsuke Inoue; Kohsoku Nagata; Kazuya Kodani (2463-2469).
Fatigue crack growth tests of lead-containing (Sn-37Pb) and lead-free (Sn-3.0Ag-0.5Cu) solders were conducted at frequencies ranging from 0.1 Hz to 10 Hz at stress ratio of 0.1, at room temperature and at 70°C. The J-integral range (ΔJ) and the modified J-integral (C *) were used in assessing the cycle-dependent and time-dependent crack growth behavior for both solders. The experimental results showed that the crack growth behavior of both solders at the lower frequency and higher temperature was predominantly time dependent, whereas the crack growth behavior of both solders at the higher frequency and lower temperature was predominantly cycle dependent, with the transition in fatigue crack growth behavior from cycle dependent to time dependent expressed as f + 6500exp(1/T) = 6520. In both the cycle-dependent and time-dependent regions, the crack growth resistance of the lead-free solder was higher than that of lead-containing solder. Fracture surface observations showed that, as the frequency decreased and/or the temperature increased, the fracture path changed from transgranular to intergranular for Sn-37Pb solder, and from transgranular to mixed transgranular–intergranular for Sn-3.0Ag-0.5Cu solder.
Keywords: Lead-containing solder; lead-free solder; creep crack growth; fatigue crack growth; frequency; temperature

Interfacial Reaction of Molten Sn on a Strained Cu Electroplated Layer by Hsiao-An Pan; Chi-Pu Lin; Chih-Ming Chen (2470-2477).
Interfacial reactions of molten Sn on a Cu electroplated layer with and without strain were investigated. A Cu layer electroplated on a rectangular Si substrate was subjected to tensile stress by bending the Si substrate on a three-point bending apparatus. Two intermetallic compounds, Cu6Sn5 and Cu3Sn, were formed at the Sn/Cu interface after reflow at 260°C for 10 min to 30 min, regardless of the strain. Top-view examination revealed that the tensile strain had significant effects on the surface morphology of the Cu6Sn5 grains. On the nonstrained Cu layer, ovoid-shaped Cu6Sn5 grains were formed first after soldering, but long, prismatic Cu6Sn5 grains precipitated on the existing ovoid-shaped grains after solidification in air. On the strained Cu layer, only ovoid-shaped Cu6Sn5 grains but no long, prismatic ones were found after solidification. A possible mechanism is proposed to explain the absence of long, prismatic Cu6Sn5 grains on the strained Cu layer.
Keywords: Interfacial reaction; strain; grain morphology; dissolution

Effect of Ni-Coated Carbon Nanotubes on Interfacial Reaction and Shear Strength of Sn-Ag-Cu Solder Joints by Y. D. Han; H. Y. Jing; S. M. L. Nai; L. Y. Xu; C. M. Tan; J. Wei (2478-2486).
In this study, varying weight percentages of Ni-coated carbon nanotubes (Ni-CNTs) were incorporated into Sn-Ag-Cu (SAC) solder matrix, to form composite solder. Up to 0.05% of Ni-CNTs were successfully incorporated. The interfacial microstructure and shear strength of solders on Ni/Au-finished Cu substrates were investigated after aging at 150°C for up to 42 days. Results revealed that, after soldering and aging for various lengths of time, the interfacial intermetallic compound (IMC) thickness of the unreinforced solder joint was observed to grow more significantly than that of the composite solder joints. Furthermore, the composite solder joints also showed lower diffusion coefficients (2.5 × 10−15 cm2/s to 3.2 × 10−15 cm2/s) compared with that of the SAC solder joints (4.9 × 10−15 cm2/s). Shear test results revealed that as-soldered and aged composite solder joints had better ultimate shear strength than their monolithic counterparts and the shear strength of all aged solder joints decreased with increasing aging time.
Keywords: Composite solder; interfacial reaction; aging; shear tests

Gap Size Effects on the Shear Strength of Sn/Cu and Sn/FeNi Solder Joints by Cai Chen; Lei Zhang; Jiaxi Zhao; Lihua Cao; J. K. Shang (2487-2494).
The effect of the gap size on the shear strength of a solder joint was investigated in both Sn/Cu and Sn/FeNi lap solder joints by varying the gap size from 20 μm to 300 μm. In the Sn/FeNi joints, the shear strength remained relatively constant, around 14 MPa, independent of the gap size. In contrast, the shear strength of the Sn/Cu joint decreased about 20% from 25 MPa to 20 MPa. The decrease was shown to result from Cu6Sn5 precipitation in the thicker Sn/Cu joint, which was absent in the thinner joints.
Keywords: Solder; size effect; shear strength; microstructure

Interfacial Reactions in Sn x Zn1−x (Liquid)/Ni(Solid) Couples at 873 K by Yuan Yuan; Dajian Li; Libin Liu; Gabriella Borzone (2495-2501).
The interfacial reactions between Sn x Zn1−x alloys and Ni substrates were experimentally investigated at 873 K. The composition profile of the layers has been determined by electron probe microanalysis (EPMA). Three ternary phases [τ1, τ2, and τ5] and three binary phases (Ni3Sn2-HT, γ-Ni5Zn21, and NiZn-LT with extended solubility of the third element) have been determined in the layers. The sequence of formation of intermetallic compounds (IMCs) in the Sn x Zn1−x (liquid)/Ni(solid) diffusion couples at 873 K, as well as changes in the morphology of the layers with Zn content and annealing time, are illustrated.
Keywords: Interfacial reactions; diffusion; Ni-Sn-Zn system; intermetallics

Electromigration Failure Mechanism in Sn-Cu Solder Alloys with OSP Cu Surface Finish by Ming-Hui Chu; S.W. Liang; Chih Chen; Annie T. Huang (2502-2507).
Organic solderable preservative (OSP) has been adopted as the Cu substrate surface finish in flip-chip solder joints for many years. In this study, the electromigration behavior of lead-free Sn-Cu solder alloys with thin-film under bump metallization and OSP surface finish was investigated. The results showed that severe damage occurred on the substrate side (cathode side), whereas the damage on the chip side (cathode side) was not severe. The damage on the substrate side included void formation, copper dissolution, and formation of intermetallic compounds (IMCs). The OSP Cu interface on the substrate side became the weakest point in the solder joint even when thin-film metallization was used on the chip side. Three-dimensional simulations were employed to investigate the current density distribution in the area between the OSP Cu surface finish and the solder. The results indicated that the current density was higher along the periphery of the bonding area between the solder and the Cu pad, consistent with the area of IMC and void formation in our experimental results.
Keywords: Electromigration; solder joints

Evaluation of Effectiveness of Conformal Coatings as Tin Whisker Mitigation by Sungwon Han; Michael Osterman; Stephan Meschter; Michael Pecht (2508-2518).
The application of a conformal coat has been considered as a mitigation strategy to prevent unintended shorting events induced by tin whisker formation in electronic products. While various conformal coatings have been shown to be effective at containing tin whiskers on treated coupons, the effectiveness of conformal coating on actual assembled hardware has not been adequately examined. In this study, the ability of six types of conformal coatings to contain tin whiskers was examined through their application to assembled gull-wing lead quad flat package test specimens. Nonuniform coverage of conformal coating on the gull-wing leads was found to be a primary concern. Quantitative image analysis using scanning electron microscopy in backscattered electron mode was developed to aid in quantifying coating coverage. The ability of applied coatings to contain tin whiskers was examined after specimens were subjected to sequential temperature cycling and elevated temperature/humidity conditions as well as exposure to corrosive gases. For all but one coating, tin whiskers were observed to escape areas of relatively thin coating. Parylene C coating was found to be the most effective coating in providing uniform coverage and thickness, and containing whiskers.
Keywords: Tin whisker; conformal coating; coating coverage

The demand for environmentally benign Pb-free solders is increasing, and the push toward smaller portable electronics will make it more likely for solder interconnects to encounter mechanical shock through dropping or mishandling. Thus, fundamental understanding of the relationship between solder microstructure and mechanical shock resistance is essential for developing reliable numerical models of mechanical shock behavior. In this paper we report on the strain rate-dependent mechanical behavior of pure Sn and Sn-3.5Ag-0.7Cu solders, measured from tensile tests conducted in the strain rate range from 10−3 s−1 to 30 s−1. Local strain and strain rate distributions were measured by digital image correlation. Finally, the strain rate dependence of fracture mechanisms is discussed. For a given strain rate, water-quenched tin–silver–copper (SAC) had the greatest ultimate tensile strength (UTS), followed by furnace-cooled SAC, then pure Sn. Furnace-cooled SAC had lower ductility than water-quenched SAC, due to large Ag3Sn needles that nucleated elongated voids which easily coalesced.
Keywords: Pb-free solder; mechanical shock; fracture

In this study, a simple one-step microwave-assisted method was developed to synthesize Cu and Cu-Ag particles for application in electrically conductive adhesive (ECA). The particle size of the obtained Cu particles was about 1 μm to 3 μm, whereas Cu-Ag particles were in the range of 0.1 μm to 1.0 μm. ECA samples were cured at 175°C for 1 h. Results revealed that the as-cured ECAs showed significant differences in electrical resistivity. The resistivity of
Keywords: Cu-filled ECA was on the order of 10−5 Ω cm, which was lower than the Cu-Ag-filled ECAs with resistivity on the order of 10−3 Ω cm. The thermal stability of the ECAs was studied under high-temperature exposure at 125°C for 1000 h. Results showed that Cu-filled ECA was thermally stable for 1000 h of aging, whereas Cu-Ag-filled ECAs were thermally stable for aging time above 100 h.

Effect of Copper TSV Annealing on Via Protrusion for TSV Wafer Fabrication by A. Heryanto; W.N. Putra; A. Trigg; S. Gao; W.S. Kwon; F.X. Che; X.F. Ang; J. Wei; R. I Made; C.L. Gan; K.L. Pey (2533-2542).
Three-dimensional (3D) integrated circuit (IC) technologies are receiving increasing attention due to their capability to enhance microchip function and performance. While current efforts are focused on the 3D process development, adequate reliability of copper (Cu) through-silicon vias (TSVs) is essential for commercial high-volume manufacturing. Annealing a silicon device with copper TSVs causes high stresses in the copper and may cause a “pumping” phenomenon in which copper is forced out of the blind TSV to form a protrusion. This is a potential threat to the back-end interconnect structure, particularly for low-κ materials, since it can lead to cracking or delamination. In this work, we studied the phenomenon of Cu protrusion and microstructural changes during thermal annealing of a TSV wafer. The extruded Cu-TSV was observed using scanning electron microscopy (SEM), 3D profilometry, and atomic force microscopy (AFM). The electron backscatter diffraction (EBSD) technique was employed to study the grain orientation of Cu-TSV and evolution of the grain size as a function of annealing temperature. The elastic modulus and yield stress of copper were characterized using nanoindentation. A model for Cu protrusion is proposed to provide insight into the failure mechanism. The results help to solve a key TSV-related manufacturing yield and reliability challenge by enabling high-throughput TSV fabrication for 3D IC integration.
Keywords: TSV; copper; annealing; protrusion; EBSD; nanoindentation; extrusion; 3D interconnect

Shrinkage and Sintering Behavior of a Low-Temperature Sinterable Nanosilver Die-Attach Paste by Tao Wang; Meihua Zhao; Xu Chen; Guo-Quan Lu; Khai Ngo; Shufang Luo (2543-2552).
The drying and densification behavior of a nanosilver paste was studied by shrinkage and weight-loss measurements to provide fundamental understanding on the sintering behavior of the nanomaterial for packaging power devices and modules. The measured shrinkage behavior was found to be in good agreement with the weight-loss behavior of the paste as measured by thermogravitational analysis, and the comparison offered direct evidence of ~10% shrinkage contributed by late-stage densification of silver nanoparticles (NPs). It was found that sintered silver joints could be achieved without cracks or delamination under a ramp-soak temperature profile for bonding small-area chips, e.g., 3 mm × 3 mm or smaller. However, for bonding large-area chips, e.g., 5 mm × 5 mm or larger, rapid evaporation of the entrapped organic species caused the chips to delaminate, leading to large longitudinal cracks at the joint interface. Finally, examination of the microstructure evolution of the silver die-attach material revealed that binder molecules inhibited necking of the silver NPs and delayed densification during the sintering process of the nanosilver paste.
Keywords: Nanosilver paste; interconnection; low temperature; sintering; densification

Ohmic Curing of Printed Silver Conductive Traces by D.A. Roberson; R.B. Wicker; E. MacDonald (2553-2566).
Ohmic heating was demonstrated as a novel curing method (or curing enhancement) useful in decreasing the resistivity of conductive traces printed with both micro- and nanoparticle-loaded inks while (1) only locally heating the substrate and (2) curing in a matter of seconds compared with the range of 30 min to 1 h required by traditional oven-curing. In one experiment using traces composed of microparticle ink, which required initial air-drying as a preprocess step, application of an ohmic curing cycle resulted in resistivity of 80 nΩ m, roughly six times that of bulk silver. In a second experiment employing nanoparticle inks, which required an initial thermal cure as a preprocess, a resistivity of 43 nΩ m, roughly three times that of bulk silver, was attained after the application of an ohmic curing cycle. Electrical characterization of the ohmic curing process was performed in real time to understand the impact of cycling and duration on the resulting conductivity. Finally, the effect of printed trace length on the ohmic curing process was explored and found to have a near-linear relationship with the reduction in resistance when the applied electrical current was normalized to measured resistance. The microstructural changes which occurred as a result of ohmic curing such as particle sintering and grain growth were characterized by scanning electron microscopy. The results presented in this work demonstrate the use of ohmic heating to overcome temperature limitations imposed on a thermal curing process by substrate material properties or other sources.
Keywords: Conductive ink; nanoparticle silver; direct print; inkjet; scanning electron microscopy; polyimide

Electroplated copper (Cu) films are often annealed during back-end processes to stabilize grain growth in order to improve their electrical properties. The effect of prebonding anneal and hence the effective initial grain size of the Cu films on the final bond quality are studied using a 300-nm-thick Cu film that was deposited on a 200-mm silicon (Si) wafer and bonded at 300°C. As compared with the control wafer pair with a prebonding anneal at 300°C for 1 h in N2, the wafer pair without a prebonding anneal showed greater improvement in void density based on c-mode scanning acoustic microscopy (c-SAM). Dicing yield and shear strength were also enhanced when a prebonding anneal was not applied. This improvement is due to substantial grain growth of smaller Cu grains during the bonding process, which leads to a stronger Cu–Cu bond. Our work has identified a Cu–Cu bonding process with a lower total thermal budget, which is seen as a favorable option for future three-dimensional (3D) integrated circuit (IC) technology.
Keywords: Cu–Cu bonding; 3D IC; grain growth

A new bonding process using an Ag2O paste consisting of Ag2O particles mixed with a triethylene glycol reducing agent has been proposed as an alternative joining approach for microsoldering in electronics assembly, which currently uses Pb-rich, high-temperature solders. Ag nanoparticles were formed at approximately 130°C to 160°C through a reduction process, sintered to one another immediately, and bonded to a metal substrate. An Au-coated Cu specimen was successfully bonded using the Ag2O paste. The resulting joint exhibited superior strength compared with joints fabricated using conventional Pb-rich solders. To improve ion-migration tolerance, the Ag2O paste was mixed with Au and Pd microparticles to form sintered Ag-Au and Ag-Pd layers, respectively. The additions of Au and Pd improved the ion-migration tolerance of the joint. Regarding the mechanical properties of the joints, addition of secondary Au and Pd both resulted in decreased joint strength. To match the joint strength of conventional Pb-10Sn solder, the mixing ratios of Au and Pd were estimated to be limited to 16 vol.% and 7 vol.%, respectively. The electrical resistivities of the sintered layers consisting of 16 vol.% Au and 7 vol.% Pd were lower than that of Pb-10Sn solder. Thus, the additive fractions of Au and Pd to the Ag2O paste should be less than 16 vol.% and 7 vol.%, respectively, to avoid compromising the mechanical and electrical properties of the sintered layer relative to those of contemporary Pb-10Sn solder. Following the addition of Au and Pd to the paste, the ion-migration tolerances of the sintered layers were approximately 3 and 2 times higher than that of pure Ag, respectively. Thus, the addition of Au was found to improve the ion-migration tolerance of the sintered Ag layer more effectively and with less sacrifice of the mechanical and electrical properties of the sintered layer than the addition of Pd.
Keywords: Silver oxide; reduction; silver nanoparticles; sintering bonding; ion migration; additive metals

Performance of Isotropic and Anisotropic Heat Spreaders by D.D.L. Chung; Yoshihiro Takizawa (2580-2587).
Anisotropic heat spreaders (flexible graphite and continuous carbon fiber polymer-matrix composite) and isotropic heat spreaders (copper and aluminum) have been evaluated numerically in terms of thermal resistance. Anisotropic ones are attractive for their through-thickness thermal insulation ability. Flexible graphite is superior to carbon fiber composite in providing lower thermal resistance. Carbon fiber composite is advantageous in its superior through-thickness thermal insulation ability and its smaller critical thickness (the optimal thickness for maximizing heat spreading while minimizing thickness). The isotropic heat spreaders are superior to the anisotropic ones in providing low thermal resistance, provided that the thickness is large, but they do not have the through-thickness thermal insulation ability. A higher value of the in-plane thermal conductivity enhances the effectiveness of flexible graphite. As the heat source area decreases, the thermal resistance increases while the critical thickness decreases. For the same heat source area, a greater in-plane dimension of the heat source perpendicular to the intended heat spreading direction decreases the thermal resistance and critical thickness. Flexible graphite is comparatively more advantageous when the thickness is smaller and when the heat source area is larger. For the same thickness below 2 mm, flexible graphite with in-plane conductivity of 1500 W/(m K) is superior to copper and that with in-plane conductivity of 600 W/(m K) is superior to aluminum. The highest thermal conductance obtained is 6.1 × 104 W/(m2 K) when the thermal interfacial resistance is neglected and 5.1 × 104 W/(m2 K) when this resistance is included. The conductance increases with decreasing heat source area and with decreasing heat spreader length.
Keywords: Heat spreader; thermal conduction; flexible graphite; carbon fiber polymer-matrix composite; copper; aluminum

This study assesses the high-temperature storage (HTS) test and the pressure-cooker test (PCT) reliability of an assembly of chips and flexible substrates. After the chips were bonded onto the flexible substrates, specimens were utilized to assess the HTS test and PCT reliability. After the PCT and HTS tests, the die-shear test was applied to examine changes in die-shear forces. The microstructure of the test specimens was analyzed to evaluate reliability and to identify possible failure mechanisms. When the duration of the HTS test was increased, the percentage of gold bumps that peeled off from the surface of the copper pads on the chip side increased, and a crack was present at the bonding interface between the gold bumps and chip bond pads. This crack was due to thermal stress generated during the HTS test, and degraded the die-shear force of the assembly of chips and flexible substrates. After the PCT, the crack was present at the interface between deposited layers of copper electrodes after the specimens were subjected to the PCT for various durations. Moisture penetrated into the deposited layers of the copper electrodes, deposited layers lost their adhesion, and the crack progressed from the corner into the central bond area as the test duration increased. To improve the PCT reliability of assemblies of chips and flexible substrates using the thermosonic flip-chip bonding process, one must prevent moisture from penetrating into deposited layers of copper electrodes and prevent crack formation at the interface between nickel and copper layers. Underfill would be an effective approach to prevent moisture from penetrating into deposited layers during the PCT, thereby improving the reliability of the samples during the PCT.
Keywords: Thermosonic flip-chip bonding process; HTS test; PCT; flexible substrate

Epoxy molding compound (EMC) has been widely used as a main material for encapsulation and protection of semiconductor packages because of its low cost, high moisture resistance, high heat resistance, and good mechanical performance. Due to the extensive application of lead-free solder in place of Sn-Pb, soldering temperature is higher than before; this demands that EMC, which is usually used for lead-free solder, should have extremely low thermal stress and excellent stability at elevated temperatures. In this work, 1,3-propanediol bis(4-aminobenzoate) (PBA) was added to an EMC product to form a novel epoxy molding compound (FEMC). PBA had very limited effect on the process feasibility of EMC, and caused reduction of the storage modulus by 40% to 50% at high temperatures and reduction of the glass-transition temperature by more than 10°C, which are very helpful to reduce thermal stress buildup during high-temperature soldering processes. The increases of the tab pull force of copper- and silver-plated lead frames within EMC due to PBA were up to 58% and 117%, respectively. With increasing PBA content in the EMC, water absorption increased in a linear fashion, so the amount of PBA added to the EMC should be limited, preferably to not more than 1%.
Keywords: EMC; PBA; mechanical properties; water absorption

During chemical mechanical polishing the distribution of wear is primarily affected by the pressure distribution on the wafer surface. Moreover, understanding the effects that influence the contact pressure plays a key role in improving the process quality. In this paper a multizone chuck is considered. Two ways to calculate the distribution of contact pressure between wafer and pad are shown. First, an analytical approach is presented, which uses the plate theory to describe the behavior of the carrier. Secondly, a finite-element simulation, which is able to handle more details, is performed to verify that the included assumptions have a negligible impact on the results. It is found that both approaches produce similar results. The reasons for the differences can be explained.
Keywords: Chemical mechanical polishing; planarization; multizone carrier

Hyperelastic Property Measurements of Heat-Cured Silicone Adhesives by Cyclic Uniaxial Tensile Test by Jue Li; Tapio Tarvainen; Jaana Rich; Markus Turunen; Mervi Paulasto-Kröckel (2613-2620).
Most of the commonly used linear elastic properties of silicone adhesives cannot precisely represent their material behavior, knowledge of which is crucial to the reliability study of electronic devices. For this reason, in this paper a widely used silicone adhesive, namely Loctite 5404, is chosen for measuring hyperelastic properties via cyclic uniaxial tensile tests. A special sample preparation procedure is developed to avoid the formation of detrimental air bubbles in the samples. Two maximum strain levels, 20% and 40%, are used in the tests. Each test includes five cyclic loadings to produce a stable stress–strain loop. Three orders of magnitude of strain rate changes are studied, and the stress–strain response of the material is found to be strain rate dependent. The measured stress–strain data are imported into Abaqus finite-element software to calibrate the material coefficients of hyperelastic material models (Mooney–Rivlin, Yeoh, Ogden, and van der Waals models). This is the first time that the hyperelastic properties of the studied silicone adhesive are presented. The determined material coefficients can be used directly in finite-element analyses and thus in reliability studies of electronic devices.
Keywords: Silicone adhesive; hyperelastic; air bubbles; finite-element analysis; reliability study

A nickel layer and a silver bonding layer have been deposited on copper electrodes over flex substrates to improve the bondability and die-shear force performance of chip–flex substrate assemblies when using the thermosonic flip-chip bonding process. For bonding temperature of 200°C, the maximum die-shear force was achieved by combining parameter values of 20.66 W ultrasonic power, 625 gf bonding force, and 0.5 s bonding time. The improved bondability and die-shear force could be attributed to better transfer of ultrasonic power across the bonding interface during thermosonic flip-chip bonding, owing to the high rigidity of the copper electrodes provided by the nickel layer. Experimental results also indicated that high bonding load is necessary at elevated ultrasonic power range to provide firm contact between the bumps and electrodes to enable smooth ultrasonic power transfer across the bonding interface. Moreover, prolonged bonding time caused cracks between the bumps and flex substrate. Close examination of the fracture morphologies after die-shear testing and after ultrasonic separation provided insight into the die-shear force performance as influenced by the process parameters and by the deposition of the nickel layer on the copper electrodes over the flex substrate.
Keywords: Thermosonic flip-chip bonding; copper electrode; flex substrate; nickel layer

High-Reliability Low-Ag-Content Sn-Ag-Cu Solder Joints for Electronics Applications by Dhafer Abdulameer Shnawah; Suhana Binti Mohd Said; Mohd Faizul Mohd Sabri; Irfan Anjum Badruddin; Fa Xing Che (2631-2658).
Sn-Ag-Cu (SAC) alloy is currently recognized as the standard lead-free solder alloy for packaging of interconnects in the electronics industry, and high-
Keywords: Ag-content SAC alloys are the most popular choice. However, this choice has been encumbered by the fragility of the solder joints that has been observed in drop testing as well as the high cost of the Ag itself. Therefore, low-Ag-content SAC alloy was considered as a solution for both issues. However, this approach may compromise the thermal-cycling performance of the solders. Therefore, to enhance the thermal-cycling reliability of low-Ag-content SAC alloys without sacrificing their drop-impact performance, alloying elements such as Mn, Ce, Ti, Bi, In, Sb, Ni, Zn, Al, Fe, and Co were selected as additions to these alloys. However, research reports related to these modified SAC alloys are limited. To address this paucity, the present study reviews the effect of these minor alloying elements on the solder joint reliability of low-Ag-content SAC alloys in terms of thermal cycling and drop impact. Addition of Mn, Ce, Bi, and Ni to low-Ag-content SAC solder effectively improves the thermal-cycling reliability of joints without sacrificing the drop-impact performance. Taking into consideration the improvement in the bulk alloy microstructure and mechanical properties, wetting properties, and growth suppression of the interface intermetallic compound (IMC) layers, addition of Ti, In, Sb, Zn, Al, Fe, and Co to low-Ag-content SAC solder has the potential to improve the thermal-cycling reliability of joints without sacrificing the drop-impact performance. Consequently, further investigations of both thermal-cycling and drop reliability of these modified solder joints must be carried out in future work.

Retraction Note: Single-Phase β-Zn4Sb3 Prepared by a Mechanical Grinding Method by Chinatsu Okamura; Takashi Ueda; Kazuhiro Hasezaki (2659-2659).